VHDL is the VHSIC Hardware Description Language, an industry standard language used to describe hardware from the abstract to the concrete level. It is embraced as the universal communication medium of design and computer-aided engineering workstation vendors throughout the industry are standardizing on VHDL as input and output from their tools. This book is aimed at hardware engineers with some experience of hardware design, but little or no experience in terms of the hardware mappings performed by synthesis. The book starts with a review of Register Transfer Level design, the foundation of logic synthesis. The basics of logic and registers are described first, then expanded by the effective use of types, including the proposed standard synthesisable types. More advanced techniques are developed, including the writing of packages and parametrisable modules. The book finishes with techniques for writing effective test benches. The concepts are illustrated throughout by examples, making it suitable as a source reference for synthesisable models.

Vhdl for Logic Synthesis: An Introductory Guide for Achieving Design Requirements

Computers & Technology

Rushton, Andrew

Programming

McGraw=Hill

Processor arrays have established themselves as an inexpensive form of parallel computer suitable for a wide range of highly parallel applications. They achieve their performance by huge replication of simple processors known as processing elements or PE. This book investigates enhancements to the conventional bit serial PE with the aim of improving its performance in situations where the small grain parallelism of a single instruction-stream, multiple data stream (SIMD) class parallel computer architecture is inefficient.  The book describes the development of an SIMD class parallel computer based on processor arrays. Surprisingly, for many problems a large array of bit serial processing elements is a better source of processing power than a small array of complex processors, and the reconfigurable processor array described here is enhanced with floating-point, multiplication, and data cache facilities to improve the operation of such arrays. The RPA also has features that allow clusters of processing elements to operate on each data item so that hardware parallelism can be matched with data parallelism.  The implementation of the architecture as a chip design, for possible VLSI realization, is described, and an appendix contains a high level formal description of the processing element in a registertransfer language.  Andrew Rushton teaches at the University of Southampton. Reconfigurable Processor Array is included in the series Research Monographs in Parallel and Distributed Computing, copublished with Pitman Publishing.

Reconfigurable Processor-Array: A Bit-Sliced Parallel Computer (Research Monographs in Parallel and Distributed Computing)

Computer Science

Mit Pr

Processor arrays have established themselves as an inexpensive form of parallel computer suitable for a wide range of highly parallel applications. They achieve their performance by huge replication of simple processors known as processing elements or PE. This book investigates enhancements to the conventional bit serial PE with the aim of improving its performance in situations where the small grain parallelism of a single instruction-stream, multiple data stream (SIMD) class parallel computer architecture is inefficient.\nThe book describes the development of an SIMD class parallel computer based on processor arrays. Surprisingly, for many problems a large array of bit serial processing elements is a better source of processing power than a small array of complex processors, and the reconfigurable processor array described here is enhanced with floating-point, multiplication, and data cache facilities to improve the operation of such arrays. The RPA also has features that allow clusters of processing elements to operate on each data item so that hardware parallelism can be matched with data parallelism.\nThe implementation of the architecture as a chip design, for possible VLSI realization, is described, and an appendix contains a high level formal description of the processing element in a registertransfer language.\nAndrew Rushton teaches at the University of Southampton. Reconfigurable Processor Array is included in the series Research Monographs in Parallel and Distributed Computing, copublished with Pitman Publishing.

Reconfigurable Processor Array

Hyperion Books

Making VHDL a simple and easy-to-use hardware description language Many engineers encountering VHDL (very high speed integrated circuits hardware description language) for the first time can feel overwhelmed by it. This book bridges the gap between the VHDL language and the hardware that results from logic synthesis with clear organisation, progressing from the basics of combinational logic, types, and operators; through special structures such as tristate buses, register banks and memories, to advanced themes such as developing your own packages, writing test benches and using the full range of synthesis types. This third edition has been substantially rewritten to include the new VHDL-2008 features that enable synthesis of fixed-point and floating-point hardware. Extensively updated throughout to reflect modern logic synthesis usage, it also contains a complete case study to demonstrate the updated features. Features to this edition include: <ul>
<li>a common VHDL subset which will work across a range of different synthesis systems, targeting a very wide range of technologies</li> <li>a design style that results in long design lifetimes, maximum design reuse and easy technology retargeting </li> <li>a new chapter on a large scale design example based on a digital filter from design objective and design process, to testing strategy and test benches</li> <li>a chapter on writing test benches, with everything needed to implement a test-based design strategy</li> <li>extensive coverage of data path design, including integer, fixed-point and floating-point arithmetic, logic circuits, shifters, tristate buses, RAMs, ROMs, state machines, and decoders</li> </ul>
Focused specifically on logic synthesis, this book is for professional hardware engineers using VHDL for logic synthesis, and digital systems designers new to VHDL but familiar with digital systems. It offers all the knowledge and tools needed to use VHDL for logic synthesis. Organised in themed chapters and with a comprehensive index, this complete reference will also benefit postgraduate students following courses on microelectronics or VLSI/ semiconductors and digital design.

VHDL for Logic Synthesis

wiley

VHDL for Logic Synthesis Second Edition Andrew Rushton TransEDA Limited, Southampton, UK Very high-speed integrated circuit Hardware Description Language (VHDL) is the worldwide standard for computer-aided electronic system design. Logic synthesis automates gate-level design, allowing the designer to concentrate on a rgister-transfer level implementation. VHDL for Logic Synthesis provides comprehensive coverage of the language and its role in the generation of hardware. This enhanced second edition takes a broader view of the use of synthesis and its place in the design cycle. Features include: * Explanation of each aspect of the language in hardware terms and demonstration of the mapping from VHDL to hardware * Updated examples using the standard packages numeric_std and std_logic_1164 plus more illustrative models offering further source references for designers * Additional chapter on std_logic_arith to aid designers still working with this popular package * New focus on libraries and library management covering the contents of the standard library, how to use library work and recommendations on code management * Extra section detailing how to use assertions to report diagnostics, allowing the reader to print signal and variable values to the screen Senior undergraduate and postgraduate students of microelectronics and digital hardware engineers new to language-based design methods will appreciate Rushton's informative introduction to VHDL and its use in logic synthesis.

John Wiley&Sons, Inc.

This book shows you how easy it is to conjure up the most delicious and beautiful Swiss homemade treats for Christmas and all year round. Swiss Cookies contains 29 of the most well-known and traditional biscuits and bakes with easy to follow instrudtions, illustrations, background information, guide to ingredients and their translations, measurement conversions and gift-wrapping ideas.

Swiss Cookies: Biscuits for Christmas and All Year Round

Cookbooks, Food & Wine

Fekete, Katalin

Baking

Schwabe

At Home contains 37 stories and tales by the popular Swiss author Franz Hohler, who has won several of the most significant literary prizes in German-speaking Europe. The endearing stories range from touching to bizarre to dead-on realistic and have been translated into English by various translators.

At Home: A selection of stories

Literature & Fiction

Hogan, Mary

Hohler, Franz

SHIELDS, ANDREW

Dicks, Dianne

Borer, Elsbeth

Routledge, Peter

Ziegler, Katherine

Short Stories & Anthologies

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